In many telecommunication systems and electronic testing instruments, a frequency synthesizer uses a phase locked loop (PLL) circuit to generate a continuous wave signal at a precise and stable frequency. These types of phase locked loop circuits are well known to those skilled in the art, and usually include a tunable voltage controlled oscillator (VCO) having an output signal that is locked to a known reference signal by a phase detector. Any output voltage is typically related to the phase difference between a reference signal and the voltage controlled oscillator output signal. The phase detector output is coupled back to the input of the voltage controlled oscillator in a feedback loop to tune and lock the voltage controlled oscillator at a desired frequency. Thus, the phase and frequency of any final output signal from the voltage controlled oscillator has the same phase and frequency as the reference signal.
Programmable divider circuits are also used in the feedback loop between the voltage controlled oscillator and the phase detector to divide the voltage controlled output signal by a factor “N”. Supplemental divider circuits can divide the reference frequency by a factor “M”. By programming the value of the ratio “N” and “M”, the voltage controlled oscillator output signal can be made equal to a desired multiple of the reference frequency.
In some prior art frequency synthesizer devices, digitally programmable continuous wave signals are generated by phase locked loop frequency synthesizers using a programmable divider operative with the reference signal. Other frequency synthesizers generate digitally programmable, continuous wave signals using digital rate multipliers and digital dividers. Rate multiplier circuits sometimes are used to program the reference frequency by suppressing pulses of a reference signal to various program values. Spur filters are sometimes operatively connected to phase detectors and a voltage controlled oscillator to reduce spurious FM side bands. Mixers can be interposed in the feedback path to shift and extend the set of frequencies that can be generated by the phase locked loop frequency synthesizer.
It is also well known that phase locked loop frequency synthesizers are commonly used to generate high frequency sources for microwave and millimeter wave radar and telecommunications equipment. The high frequency source, also known as the Local Oscillator (LO), is used to up-convert low frequency transmitter signals to high frequency RF signals, or down-convert received RF signals to lower frequencies. Traditionally, phase locked loop frequency synthesizers have used an accurate, relatively spur free, crystal oscillator reference typically found to be in the range of about 10 to about 100 MHz. The phase noise and spur levels of a reference clock signal are very critical, because at the output of a voltage controlled oscillator, any spurious signals are multiplied by the ratio of the voltage controlled oscillator to the phase comparison frequency. This directly impacts the performance of the closed phase locked loop circuit.
As is known to those skilled in the art, a typical phase locked loop circuit compares the phase of the divided reference clock, with that of the divided voltage controlled oscillator output signal. Any error detected in the phase between the signals is converted to a voltage that is used to correct the voltage controlled oscillator phase error. The correction voltage is applied through a filter to reduce spurious signals in the output signal, and improve the close-in, phase noise performance of the phase locked loop circuit. The loop bandwidth is typically established wide enough to reject the close-in noise of the voltage controlled oscillator, but narrow enough to reduce spurious signal levels in the signal output, thus, yielding an optimized noise spectrum that is better than that of the voltage controlled oscillator alone.